An Analytical Network Processor Performance Analysis Methodology

How to allow fast network processing unit (NPU) performance testing in supporting fast data path functions in a router is a challenging issue. It is more so in a router design phase when there are a vast number of design choices to be tested and the microcode for the fast data path functions is yet to be developed. In this paper, a novel NPU worst-case performance analysis methodology is developed to address this issue. Fundamental conditions which bound the NPU worst-case performance are established. On the basis of these conditions, performance bounds for wire-speed forwarding are derived. These performance bounds allow the performance of the fast data path functions to NPU configuration mapping to be quickly tested solely based on the size and latency estimation of the worst-case code path derivable from the pseudo code of the fast data path functions. Case studies based on the code samples available in the Intel IXP 1200 and 2400 Developer Workbenches are performed. The worstcase performance bounds are found to be within 17% of the cycle-accurate simulation results. With this methodology, efficient tools can be developed to facilitate fast NPU performance testing.